Electrical apparatus including interlocking circuit for ground fault sensor

ABSTRACT

A ground fault sensor circuit adapted to provide output signals and receive input signals as part of an overall ground fault detection system including a plurality of such ground fault sensor or detector circuits, associated circuit interrupters and current monitors. The sensors are adapted to be electrically interlocked so any or all of them may be completely disabled from actuating an associated circuit breaker or may actuate a circuit breaker instantaneously depending upon the presence or absence of an input signal or may provide an output signal to actuate other ground fault sensors or give indications of predetermined operating conditions.

United States Patent Wilson et al.

5] Oct. 10, 1972 [72] Inventors: John I. Wilson; Wardell Gary, both ofBeaver, Pa.

[73] Assignee: Westinghouse Electric Corporation,

Pittsburgh, Pa.

[22] Filed: Aug. 30, 1971 [21] Appl. No.: 176,115

. [56] References Cited UNlTED STATES PATENTS 11/1970 Stevenson..3l7/18D l/l97l Zocholl ..3l7/335C 3,496,417 2/1970 Tenenbaum ..3l7/36TD 3,273,017 9/1966 Mathews ..3l7/29R Primary Examiner-J. D. MillerAssistant Examiner-Harvey F endelman Attorney-A. l. Stratton et al.

[ ABSTRACT A ground fault sensor circuit adapted to provide outputsignals and receive input signals as part of an overall ground faultdetection system including a plurality of such ground fault sensor ordetector circuits, associated circuit interrupters and current monitors.The sensors are adapted to be electrically interlocked so any or all ofthem may be completely disabled from actuating an associated circuitbreaker or may actuate a circuit breaker instantaneously depending uponthe presence or absence of an input signal or may provide an outputsignal to actuate other ground fault sensors or give indications ofpredetermined operating conditrons.

14 Claims, 5 Drawing Figures SOURCE OF POWER SUPPLY Wsw 1461' 49 Raw L31LT 491s 37US ELECTRICAL APPARATUS-INCLUDING INTERLOCKING CIRCUIT FORGROUND FAULT SENSOR CROSS-REFERENCES TO'RELATED APPLICATIONS Certaininventions related to those disclosed in the present application aredisclosed and claimed in copending applications, Ser. No. 175,880 (W.E.Case No. 42,729) filed concurrently by G. Watson and M. B. Breenen andSer. No. 176,114 (W.E. Case No. 42,1 11) filed concurrently by J. T.Wilson which are both assigned to the same assignee as the assignee ofthe present application.

BACKGROUND OF THE INVENTION This invention relates to ground faultsensor or detector circuit and it has particular relationship to groundfault detector circuits which form part of a ground fault detectingsystem wherein each ground fault detector circuit has input and outputcapabilities which cooperate with those of the other detector circuits.

Known types of ground fault sensors nonnally function relativelyindependently of other ground fault sensors in the same electricaltransmission or distribution system. The only coordination orinterrelation between the operation of the various sensors (and theirassociated circuit breakers) in the system may be the preset orpredetermined time delays provided on each of the ground fault sensorsin the system. In such cases, one ground fault detector or sensor maycause a tripping operation of its associated circuit breaker beforeanother detector. It would be advantageous to have a means oftransmitting or communicating by interlocking circuits the operatingstatus of each ground fault detector to others in the same system. Morespecifically, ground fault detectors with input and output terminalsadapted to be interconnected with other associated ground faultdetectors in an overall system of ground fault detectors would bedesirable.

SUMMARY OF THE INVENTION In accordance with the present invention, acircuit is provided in a ground fault sensor, such as the general typedisclosed in copending applications, Ser. Nos. 176,114 and 175,880 (W.E.Case Nos. 42,111 and 42,729) which is capable of providing an outputsignal to a remote monitor or to another ground fault detector or sensorwhich may be part of .a protective system including a plurality of suchground fault sensors. This signal may be provided when the initialground fault sensor or any one of the associated sensors in the systemis actuated by or responds to the presence of one or more ground faultcurrents in the protected electrical circuit.

In addition, each ground fault sensor is adapted to receive signals attwo different sets of input terminals. The input terminals are adaptedto receive the type of output signals generated by the previouslymentioned output circuitry of the associated ground fault sensors. Oneof these input signals may be used to change the mode of operation of aground fault sensor from a time delayed trip actuation to aninstantaneous trip actua tion such as the type specifically described incopending application, Ser. No. 176,114 (W.E. Case No.

42,111). Another signal may completely inhibit the tripping of theassociated circuit breaker controlled by a particular ground faultdetector regardless of any other operating response which may occur inthe controlling ground fault sensor.

BRIEF DESCRIPTION OF THE DRAWINGS For a better understanding of theinvention,

reference may be had to the preferred embodiment, ex-

emplary of the invention shown in the accompanying drawings, in which:

FIG. 1 is a functional block diagram of a ground fault sensor embodyingthe principal features of the invention and including input and outputterminals adapted to be interconnected with those of associated groundfault sensors in an interlocking ground fault current sensor system;

FIG. 2A shows a ground fault sensor with control means;

FIG. 2B shows a current monitor which may form part of the overallsystem;

FIG. 3 shows a schematic circuit diagram of the ground fault sensorshown in block form in FIG. 1; and

FIG. 4 shows an electrical transmission system and an associated groundfault detecting system including current monitors, circuit breakers andinterconnected ground fault sensors.

DETAILED DESCRIPTION OF THE DRAWINGS Referring now to the drawings andFIG. 1 in particular, an electrical transmission system 28 including asource of electrical power 12 and an electrical load or load circuit 14is illustrated. This system is similar to those shown in copendingapplications, Ser. Nos. 176,114 and 175,880 (W.E. Case Nos. 42,111 and42,729). Ground fault sensor 32" includes a variable delay means 67which in turn includes a variable delay disabler circuit 68' and aninhibitor circuit 69. The input terminal 67IS of the inhibitor circuitfunctional block 69 is also the input terminal for the variable delaydisabler circuit 67. The output terminal 64' of the variable delay means67 is connected to terminal 64 of variable delay circuit 40. The outputterminal 691. of inhibitor circuit 69 is connected to the input terminal681 of the variable delay disabler circuit 68. The Timed Trip InputSignal terminal 67IS adapted to receive a signal from an external sourceor means which will cause inhibitor circuit 69 to prevent the operationof variable delay disabler circuit 68, which is normally energized by aseparate input signal provided at output terminal 62 of voltagecomparator 38, from affecting the operation of the variable delaycircuit 40. Consequently, any predetermined or fixed time delay whichmay have been provided in the operation of the variable time delaycircuit 40 through the adjustment of the time delay control 42 will beeffective to delay the tripping of circuit breaker 250 after the sensingof a ground fault current by current monitor 30. This mode of operationoccurs if terminal 67IS is energized by a proper energizing or controlsignal. The input signal which is provided to the variable delaydisabler circuit 68 from the voltage comparator circuit 38 by way ofterminal 62 may be provided from any suitable input electrical circuitsuch as electrical circuit 35.

The input electrical circuit 35 which includes the sensor signalconditioner circuit 36 and the voltage comparator circuit 38 may providean input signal for an output remote signal generator 37. The outputremote signal generator 37 has an Output Signal terminal 37US, thesignal at which may be used to remotely affect the operation of otherground fault sensors or similar control devices. The output signal atterminal 37US is provided when the current monitor 30 senses asignificant or predetermined ground fault current, regardless of whetheroutput signal terminal 37US is connected to a remote or external load ornot.

More specifically, the input signal to the output 'remote signalgenerator 37 is applied thereto from the output terminal 36A of thesensor signal condition 36.

Ground fault sensor 32" includes another functional circuit means, morespecifically the switch disabler circuit 49. Switch disabler circuit 49is adapted to receive input information or signal information or asignal from the No-trip input signal terminal 49IS. The switch disablercircuit 49 when energized or actuated provides a function whereby theoperation of the output electrical circuit 43, is inhibited or preventedfrom operating to the extent that circuit breaker or interrupter 250 maynot be tripped or contacts 250A, 250B, 250C and 250D remain openedregardless of the operating conditions in any other portion of theoverall circuit of the ground fault sensor 32".

Ground fault sensor circuit 32" as just described is therefore adaptedto receive external signals from other ground fault sensors such as 32"and to provide external signals to other ground fault sensors such as32" thus forming the basic building block of a multisensor ground faultprotection system or network.

Referring to FIGS. 2A and 2B, a current monitor 30 which may be the typeshown used in FIG. 1 to sense ground fault current is shown. Also shownis ground fault sensor 32" including an adjustable sensitivity controlmeans as indicated at 70A for fixing or determining the value of groundfault current which will cause the actuation or tripping of a curcuitbreaker such as 250, shown in FIG. 1, for example and an adjustabledelay control means as indicated at 42 which may vary the time delay fortripping a circuit breaker or interrupter which may be actuated byground fault sensor 32". CT Input terminals 34A and 348 on the groundfault sensor 32" shown in FIG. 2A may be connected to output terminalsof a current sensor or current monitor or current transformer 30 such asshown in FIG. 2B. The trip coil of a circuit breaker such as circuitbreaker 250 shown in FIG. 1 may be connected between the Shunt Tripterminals 60P and 605 of the ground fault sensor 32" shown in FIG. 2A.In addition, terminal 60? may also act as a common terminal for a powersupply means such as ground fault sensor power source 60 shown in FIG.1, power source 60 may be connected at its other terminal to terminal60N of ground fault sensor 32". Ground fault sensor source or powersupply 60 may comprise an alternating current or Direct currentenergizing means which may range between 40 and 120 volts. The onlylimiting criterion being that the shunt trip coil in the circuit breaker250 must be matched to or coordinated with the voltage and frequency ofpower supply 60. Input terminals 67lS and 4915, output terminal 37US andcommon terminal 31LT of ground fault sensor 32" all of which werepreviously described are also shown in FIG. 2A.

Referring now to FIG. 3, an electrical circuit or system which mayrepresent, in detail, a schematic diagram of ground fault sensor 32' isshown. The connections to the source of power 12 and load circuit 14 arealso indicated in FIG. 3. Phase currents IA, [8, [C are shown flowing inphase wires 0A, 0B, 0C, respectively, and neutral current IN is shownflowing in neutral wire N. In addition, circuit breaker contacts 250A,2503, 250C and 2$0N are adapted to be actuated to the open positions toisolate the load circuit 14 from the source of power 12. In the eventthat a ground fault current is sensed by current monitor or loop currenttransformer 30, an induced primary alternating current IP33 flows intothe primary winding terminals 345 and 34A of the primary winding P ofisolation transfonner Tl. Consequently, a secondary current IS flows inthe secondary winding S of transformer T1. Current IS comprises twocomponents. One current component is lSl which flows through resistors72 and 70, which are serially connected across the secondary winding Sof isolation transformer T1. Resistor or potentiometer is adjustable orvariable to provide a lower or higher resistive load for current IS sothat the component of current ISl flowing through resistors 70 and 72may be made relatively larger or smaller for a particular value ofground fault current sensed by current monitor 30. The adjustableresistor or rheostat 70 may be known as a sensitivity control means. Thesecond component of the current IS is current IS2 which flows into afull wave electrical bridge rectifier circuit 76 through input terminals76 IL and 76 IR. Current 1S2 may be made relatively larger or smaller inmagnitude for generally the same magnitude of primary current IP33 byvarying the resistance means 70. This circuit arrangement provides anoutput current [B which flows from positive output terminal 76P ofbridge 76 to negative output terminal 76N of bridge circuit 76. CurrentIB, flowing through resistors 78, may produce or develop a sufficientmagnitude of unidirectional current voltage V4 at point or junction 81to actuate other portions of the ground fault sensor 32' The magnitudeof voltage V4 produced or developed by the current IB flowing throughresistors 78 is regulated by filter capacitor 77 and may typically be ofsuch a value that a ground fault current having a magnitude of fiveamperes, for example, may produce a value of current IP33 in the currentmonitor 30 which is sufficient to develop a value of voltage V4 atjunction 81 which may cause the ground fault sensor 32" to actuatecircuit breaker or circuit interrupter 250.

The output remote signal generator 37 includes resistor 78, which maycomprise in series circuit combination a resistor 78A and resistor 78Bhaving a common interposed junction 78] connected to the base of an NPNtransistor 204. The emitter of transistor 204 is connected through aresistor 202 to the negative terminal 76N of the bridge rectifiercircuit 76. The collector of transistor 204 is connected through aresistor 200 to terminal or junction 85 which is maintained at a voltageV2 which is approximately l5 to 16 volts (direct current). Under normalconditions, that is, when no ground fault current is detected by currentmonitor 30, transistor 204 is maintained in the off state in which nosignificant electrical current is conducted from the collector to theemitter. However, should a predetermined amount of ground fault currentbe detected or sensed by monitor 30, the unidirectional current voltageat terminal 78.] between the resistors 78A and 78B due to the change inoutput current from the bridge circuit 76 will become sufficiently largeto forward bias the base-to-emitter circuit of transistor 204 causingcurrent to flow from terminal 85 through collector resistor 200, throughthe collector-to-emitter circuit of transistor 204 and through theemitter resistor 202 to the return or common conductor 31 and to theterminal 76N. The resulting voltage which is developed across emitterresistor 202 is applied to the gate 206 of a silicon controllerrectifier or similar gated means 208 to actuate the silicon controlledrectifier or similar gated means 208 to turn on or to provide aconducting path for electrical current from its anode to cathode. Theanode and cathode of silicon controlled rectifier 208 are connected tothe output terminals 210] and 210N respectively as illustrated to abridge circuit 210'. Terminal 60P of the source 60-of sensor circuit 32"is connected through the primary winding P of transformer T4 and theresistor 216 to the input terminal 210Ll of full wave bridge circuit210. The other input terminal 210Rl of bridge circuit 210 is connectedto the other terminal 60N of the power source 60 of the ground faultsensor circuit 32". When silicon controlled rectifier 208 is actuated toa state of conduction or turned on, a current carrying path resultsbetween the terminals 210Ll and 210R1. This allows alternating current371 to flow in the primary winding P of transformer T4. Resistor 212 andcapacitor 214 are connected in series circuit relationship across theanodeto-cathode circuit of the silicon controlled rectifier 208. Thiscombination of the resistive element 212 and capacitive element 214serves a dual purpose. The first purpose is to filter the electricalcurrent which flows from the output terminals 210? and 210N of bridgecircuit 210 and the second purpose is to provide a surge or voltagesuppression means for energy induced by high rates of voltage changewith respect to time which may be electromagnetically coupled betweenthe anode and cathode of silicon controlled rectifier 208 and which maycause it to spuriously turn on. The secondary winding S of transformerT4 is connected at one end to signal common terminal 31LT through commonline 31L and at the other end to output terminal 37US. If an electricalload is connected between signal common terminal 31 and output terminal37US, alternating current 378 will flow in the secondary winding S oftrans former T4 which current may be used to energize a load. Thiscurrent or signal may be considered as the output signal of the outputremote signal generator 37.

When voltage V4 reaches a value which is sufficient to forward biasisolating diode 82, the normally conducting or tumed-on transistor 84will be turned off. Transistor 84 may be of the PNP type and have resistance means or resistor 86 connected to its emitter. The other end ofresistor 86 is connected to a source of voltage V2 which may in turn beprovided by a separate ground fault sensor power source 60. Voltage V2may, be a highly regulated direct current voltage having a value ofvolts, for example. Also connected to the emitter of transistor 84 is aresistive means or component 94 which may comprise a single resistiveelement or a pair of resistors or resistive elements 94A and 943connected in series circuit relationship with one another,- the otherend of this combination may be connected to common line or bus 31.Connected to the base of the transistor 84 is the cathode of thepreviously mentioned isolating diode 82 and a base drive resistor 88which may also comprise a pair of resistors 88A and 8813 connected inseries circuit relationship with one another and which may have theother end connected to bus 31.

Variable delay disabler circuit 68 as also shown in FIG. 1 includes onNPN transistor 168. The junction 172 between resistor 88A and resistor88B is connected to the base of transistor 168. The junction 174 betweenresistors 94A and 94B is connected to the emitter of transistor 168. Thecollector of transistor 168 is conencted to one end of a combinationtiming and reset capacitor 104 and also to the collector of transistor84 and to the base of transistor 1 10.

In the operation of the disabler circuit 68', the collector-emittercircuit of the transistor 168 is normally non-conducting in the absenceof a predetemiined ground fault current. Assuming that an inhibitinginput signal is not applied to the terminals 67IS and 31LT of theinhibitor circuit 69, as will be described hereinafter, the transistor168 will be actuated to a conducting condition in its collector-emittercircuit if a predetermined ground fault current forward biases the diode82 and increases the voltage at the junction 172. If an inhibiting inputsignal is applied to the terminals 6715 and 31LT, the base of thetransistor will be maintained at a voltage which is close to the voltageat the common line 31 and the transistor 168 cannot then be actuated toa conducting condition in response to a predetermined ground faultsignal which may forward bias the diode 82 and increases the voltage atthe terminal 172.

Connected between the emitter and collector of transistor 84 is themulti-purpose timing capacitor 104. The multi-purpose timing capacitor104 may comprise a combination reset and timing means. Normally,electrical current flows from junction or conductor 85 through emitterresistor 86 and the resistor 94 (or resistors 94A and 94B), and to thecommon line 31. This current establishes a voltage V5 at junction 87 orat the emitter of transistor 84 which may be approximately 12 volts andwhich is positive with respect to the voltage at the common conductor31. The voltage, V5, is sufficient normally to forward bias transistor84 to an on state and cause current to flow into the base-drive resistor88. Considering the voltage at the junction between the anode of thediode 82 and the resistor or resistors 88, as long as voltage V4 isinsufficient to forward bias diode 82 and, consequently, turn off or actuate transistor 84 to a substantially non-conducting condition, then avirtual short circuit will be normally effective across the timing orreset capacitor 104 to prevent the charging thereof.

Junction point is connected to common line 31 and to terminal 76N ofbridge circuit 76 through a resistor or resistive element 106 which maycomprise a pair of resistors 106A and 106B where the value of resistor106B may be variable. When electrical current flows through resistor 106(or the pair of resistors 106A and 1068), the voltage V6 at junctionpoint 100 is substantially equal to Voltage V5, the difference being theemitter-to-collector voltage drop across transistor 84. But whentransistor 84 is turned off or actuated to a substantiallynon-conducting condition due to the forward biasing of the diode 82,then current flow to the resistive means 106 from the collector oftransistor 84 is negligible and voltage V6 changes. But voltage V6 isconstrained to not change instantaneously because of the time requiredfor capacitor 104 to charge. Assuming that the transistor 168 issubstantially non-conducting due to the presence of an inhibiting signalat the terminals 671s and 31LT of the inhibitor circuit 69, the RC timeconstant for charging capacitor 104 is determined by the values ofcapacitor 104 and resistors 86, 106A and 1068 and may be varied bychanging the value of resistor 1063 which is adjustable or variable. Ascapacitor 104 charges, voltage V6 at junction point 100 changes towardthe voltage value of common conductor 31 which may be substantially zerovolts. If V4 subsequently decreases to a value which results in theforward biasing of transistor 84 again before the end of a predeterminedtime delay then capacitor 104 quickly discharges or resets through thecollector-to-emitter circuit of transistor 84. If the transistor 168 isactuated to a conducting condition at the same time as the transistor 84is turned off assuming there is no inhibiting signal at the terminals67lS and 31LT, the change in the voltage V6 at junction 100 will occuralmost instantaneously as described in detail in copending applicationSer. No. 176,114 (W.E. Case 42,111).

Junction point 100 is also connected to the base of a second transistor110. Transistor 110 is normally off or substantially non-conducting whenvoltage V6 is higher than the voltage V3 at the junction 112 or emitterof the PNP transistor 110. However, as the value of voltage V6approaches the value of the voltage at the common conductor 31,transistor 110 is turned on or actuated to a saturated condition andcurrent flows from the voltage source indicated at V3 through theemitter-to-collector circuit of transistor 110 and the resistors 114,116 and 118, to the common terminal or bus line 31. Voltage V3 may, forexample, be a direct current voltage of approximately 6.8 volts which ispositive with respect to the voltage at the terminal 76N or common line31. As current flows through the resistors 114, 116, 118, voltage valuesare established or result at junction points 120 and 133 respectivelywhich are indicated as voltages V7 and V9, respectively.

Junction point 120 is connected to the base 1228 of a third transistor122 which is also normally in the off or substantially non-conductingstate because voltage V7 at base 1228 is very low or near the voltagevalue of line 31, relative to the voltage V1. Consequently, current fromvoltage source V1 flows through resistor 124 into the base 128B of thenormally on or saturated transistor 128 and through the baseto-emittercircuit of transistor 128 to the system common conductor 31. This basedrive current normally forward biases or maintains transistor 128 in aconducting state. However, should the value of voltage V7 rise,

such as in the case when transistor 110 is turned on,

the collector-to-emitter circuit of transistor 122 may also be actuatedto a conducting or on state. Consequently, some of the current which hadpreviously been flowing into the base 128B of transistor 128 may beshunted through or transferred to the collector-toemitter circuit of thenewly conducting transistor 122. As a result, transistor 128 ceases toconduct or is actuated to a substantially non-conducting or offcondition because of the loss of base drive current. When transistor 128ceases to conduct, current flowing from voltage source V1 throughresistor 130, the closed switch 46 and the collector-to-emitter circuitof transistor 128 to common line 31 ceases to flow or decreases to anegligible value. Therefore the voltage V8 at gate terminal 133G ofgating means or switch 132 increases in value because the voltage dropacross the resistor 130 due to current flowing through resistor 130substantially decreases. An increase in voltage V8 energizes gate 133Gand causes silicon controlled rectifier (SCR) Triac or gated staticswitch 132 to conduct electrical current from an available sourcethrough its anode-to-cathode circuit and through diodes 136 and 138 tothe common line 31 or negative terminal 76N of bridge circuit 76. Thiscurrent may flow into the lastmentioned anode from the voltage source V1through resistor 124 and resistor 127 which are connected in seriescircuit relation with the anode of the SCR 132. The anode of the siliconcontrolled rectifier 132 is also connected to the diode 140A. Theactuating or turning on of silicon controlled rectifier or thyristor 132in effect completes an additional circuit or current carrying pathbetween the two output terminals of Power Source 60 and allows currentto flow through circuit breaker trip coil 147 and the diode 140A toenergize the coil 147 and to actuate circuit interrupter 250 to open.

Presuming that no input signal is present at the terminal 671S and thatvariable delay means or enabler circuit 67 has been actuated by a groundcurrent signal so as to operatively or effectively connect the emitterof variable delay disabler transistor 168 to junction point or in otherwords that a sufficient amount or value of voltage is provided atjunction 172 through the voltage divider 88 to overcome the relativelyfixed or predetermined voltage present at terminal 174 and consequentlyforward bias transistor 168 which is normally non-conducting, then theright end of capacitor 104 as illustrated or junction point 100 will beeffectively connected to system common line 31 through thecollector-to-emitter circuit of transistor 168 and the relatively smallresistor or resistance means 94B. The

value of resistor 94B is selected to be relatively small compared withthe total resistive value provided by the serially connected resistorsor resistive elements 106A and 106B of resistive element or resistor106. Consequently, capacitor 104 quickly charges to the voltagepotential present at common line 31 which may be substantially zero. Therate of charging of capacitor 104 is relatively fast so as to be almostinstantaneous. Consequently, transistor is turned on almostinstantaneously and the functions which have previously been describedand which follow from the turning on of transistor 110 and whichculminate in the opening of circuit interrupter 250 occur rapidly sothat circuit breaker 250 causes or actuates contacts 250A, 2503, 250Cand 250N to open almost instantaneously after a ground fault current hasbeen sensed by sensing means or monitor 30.

In the event that the operation of the disabler circuit 68' of variabledelay means 67 is inhibited by an input signal applied at the terminals67lS and 31LT, so that there can be substantially no electricalcontinuity or circuit established between junction 100 and common line31 as just described, circuit 32" will operate in response to apredetermined ground current signal to provide a predetermined timedelay before turning on transistor 110 in a manner which is described indetail in copending application, Ser. No. 175,880 (W.E. Case No.42,729).

The variable resistor 1068 used in combination with resistor 106A,resistor 86, and capacitor 104 may be varied so as to provide timedelays in a predetermined range which may extend between the timerepresented by cycles of an alternating current electrical system andthe time represented by approximately 40 cycles. However, the actuationof the variable delay disabler circuit 68 may for example reduce theoperating time to less than the time represented by one cycle in asimilar alternating current electrical system.

In order to provide a memory means 44m for circuit 32", the previouslymentioned increase in voltage V8 at gate or terminal 1336 may be fedthrough a forward biased diode 134 to junction point 133. The voltage atjunction point 133 indicated by V9 increases in voltage value. Thisincrease in the value of voltage V9 is reflected through resistor 116 tojunction point 120 causing voltage V7 to increase proportionally or insome other relationship. Consequently, the base 122B of transistor 122is further forward biased regardless of what may happen in thepreviously mentioned associated preceding stages of the overall circuit32", and the gate voltage V8 at terminal 1336 is once again lowered ordecreased and the silicon controlled rectifier 132 remains conductinguntil a normally closed reset means 46 which includes means foroperatively disconnecting power source V1 from gate 1336 is actuated tothe open position. Operation of the latter reset means also causes areset of the memory means 44m. In this particular embodiment, current146l which flows into the anode of the silicon controlled rectifier 132comprises a half wave, rectified electrical current, as illustrated bywave shape or pulse train 146W. The ground fault sensor power supply 60may provide sixty hertz, alternating current voltage of any desiredvalue.

Power supply 60, as illustrated, has a first terminal 60? which may beinstantaneously positive, as indicated and a second terminal 60N whichmay be instantaneously negative, as indicated. The anode of the siliconcontrolled rectifier 132 is connected to terminal 60S through a diode140A with the anode of the diode 140A being connected to terminal 60Sand the cathode thereof being connected to the anode of siliconcontrolled rectifier 132. Terminal 608 is connected through a switch 148to the shunt trip coil 147 of circuit breaker or interrupter 250. Theother end of shunt trip coil 147, as illustrated, is connected to theterminal 60? of the power supply 60 which is indicated as beinginstantaneously more positive. The return path to power supply 60 isthrough diodes 136 and 138 and diode 210D of the bridge circuit 210 tothe instantaneously more negative terminal 60N of the ground faultdetector power supply 60. Trip coil 147 must be suitably chosen to suitor coordinate with the power and voltage provided by current 146].

The inhibitor circuit 69 o ffie delay enabler means or circuit of theground fault sensor circuit 32" shown in FIG. 3 comprises a bridgerectifier circuit 220, the output of which is connected to a resistor224 and capacitor 222 which are connected in parallel circuitrelationship. The base of a transistor 226 is connected jointly to oneend of resistor 224, one end of capacitor 222 and the positive outputterminal 220! of full wave rectifier bridge circuit 220. The emitter oftransistor 226 is connected jointly to the other end of resistor 224,the other end of capacitor 222, the negative terminal 220N of full wavebridge rectifier circuit 220 and the common bus 31. Terminal 220N isalso connected to the negative terminal 76N of bridge circuit 76. Thecollector of transistor 226 is connected to the base of the previouslymentioned inhibitor transistor 168. The input terminals 2201. and 220Rof bridge circuit 220 are connected to the secondary winding S of atransformer T2. If an alternating current 678 flows in the secondarywinding S of transformer T2, a unidirectional current voltage resultsbetween positive output terminal 220] of bridge circuit 220 and negativeoutput terminal 220N, which voltage may be made sufficiently large toforward bias the normally substantially non-conducting or off transistor226 and thus operatively connect the base of transistor 168 to thenegative output terminal 76N of the bridge circuit 76, through thecollector-to-emitter circuit of transistor 226. When the base-emittercircuit of transistor 226 is forward biased, transistor 168 becomesreverse biased or turned off. As a result, terminal at the junctionpoint between the collector of transistor 84 and the base of transistorwill not be effectively connected to terminal 76N through thecollector-toemitter circuit of transistor 168 and the resistor 94B andthe nor mal timing operation as controlled by the timing capacitor 104and resistive elements 86, 106A and 1068 will be allowed to start orcontinue. Therefore any predetermined time delay which is set oradjusted through the use of the adjustable resistor or resistance means106B will cause the tripping of circuit breaker 250W to be delayed by apredetermined time period after the sensing of a ground fault current bycurrent monitor 30. The primary winding P of transformer T2 is connectedat one end to the signal common terminal 31LT and at the other end tothe input terminal 67lS. lf a current 671 flows in the primary winding Pof transformer T2 due to the application of a remote energizing orcontrol signal between terminal 67lS and common terminal 31, the groundfault sensor circuit 32" will be enabled or permitted to time out ordelay the actuation of circuit breaker 250 shown in H6. 3 according tothe adjusted delay setting of adjustable rheostat 106B. Otherwise,current breaker 250 will be actuated to trip almost instantaneously uponthe sensing of a predetermined ground fault current.

The switch disabler circuit 49 as shown in FIG. 3, comprises circuitelements similar to the circuit elements previously discussed withrespect to the variable delay enabler circuit 67. The switch disablercircuit 49 includes an input bridge rectifier circuit 230 having apositive output terminal 230P and a negative output terminal 230N.Connected to the positive output terminal 230? of bridge circuit 230 areone end of the capacitor 232, one end of the resistor 234 and the baseof the transistor 236. Connected to the negative output terminal 230N ofbridge circuit 230 is the other end of capacitor 232, the other end ofresistor 234 and the emitter of transistor 236. The negative outputterminal 230N of the bridge circuit 230 is also connected to thenegative terminal 76N of the input bridge circuit 76 through the bus 31.The collector of transistor 236 is connected to the gate 1336 of siliconcontrolled rectifier 132. The input terminals of full wave rectifierbridge 230 are terminals 230L and 230R. The opposite ends of thesecondary winding S of transformer T3 are connected to terminals 230Land 230R so that an alternating, pulsating or time varying current 498may flow as indicated in FIG. 3. When current 498 flows, a sufficientpositive voltage may result at terminal 230? of bridge circuit 230 tocause transistor 236 to conduct thus effectively connecting the gateterminal 1336 of silicon controlled rectifier 132 to the negativeterminal 76N of the input bridge circuit 76. Consequently, any othersensor system operation which might otherwise attempt to positively biasthe gate 1336 of silicon controlled rectifier 132 will be ineffective.In other words, silicon controlled rectifier 132 cannot be actuated to aconductive state when current 498 flows in the secon dary winding S oftransformer T3. The primary winding P of transformer T3 is connected atone end to the signal common bus 31L and at the other end to the inputterminal 4918. If sufficient input signal strength is provided betweenterminal 4918 and system common terminal 31L, a current 49P flows in theprimary P of transformer T3 and the secondary current 498 is induced inthe secondary winding S.

It will be noted that the ground fault detector power source 60 may alsosupply the power to provide voltages V1, V2 and V3 of the ground faultdetector 32" and it also should be noted that it is possible for theground fault detector power source 60 to have a voltage range between 40and 120 volts (AC or DC) and actuate the components of ground faultdetector 32" as well as to energize the shunt trip coil 147. VoltagesV1, V2 and V3 which were previously mentioned may be direct orunidirectional current voltages having values of approximately 110volts, volts and 6.8 volts, respectively. The terminal 60F of powersource 60 is also connected to a resistor 60R1 which is connected at itsother end to a diode 60D1 and a storage capacitor 60C1. If the powersource 60 supplies a direct current voltage, diode 60D] may be forwardbiased and capacitor 60C] charged to near the peak value of voltagepresent at the terminal 60P of ground fault detector power source 60.This voltage may be, for example, 40 volts (direct current). If thesource 60 supplies alternating current, then only positive fluctuatinghalf cycles will be present at the cathode of diode 60D1. The cathode ofdiode 60D1 is connected to a second capacitor 60C2 which acts as acombination filter capacitor and energy storage capacitor. It will benoted that voltage Vl may be regulated less effectively in the case ofan alternating current source of power 60. The source 60 is neverthelesseffective to provide power through resistor 60R2 to energize Zenerdiodes 6021 and 6022 to produce highly regulated values of voltages V2and V3, at terminals or junctions 85 and 112, respectively.

A capacitor 142 and a resistor 144 are connected in series circuitrelationship across or in parallel with the series circuit whichincludes the silicon controlled rectifier or gated valve 132 and diodes136 and 138. The capacitor and resistor combination which includes thecapacitor 142 and the resistor 144 serves a dual purpose. First, itprevents a spurious anode tum-on or triggering of the silicon controlledrectifier 132 when a high rate of voltage change with respect to time isimpressed across the anode-to-cathode circuit of silicon controlledrectifier 132, because the capacitor 142 and resistor 144 suppressrelatively high values of voltage rise with respect to time. Second,since the capacitor 142 and resistor 144 are also connected in serieswith the anode of diode 140A they act as a filter network for anyfluctuating component of current 1461. Capacitors or capacitive elements162, 179, 177 also act as voltage spike suppression capacitors fortransistors 84, and 122 respectively. Capacitor or capacitive element160 also acts as a voltage spike suppression means.

Bridge circuit 76 may comprise parallel diode pairs 76A, 76B, 76C and76D. These diodes may be arranged in parallel pairs to accommodate largevalues of current in the bridge circuit or full wave rectifier means 76.Parallel diode array 164 associated with the bridge circuitry 76 maycomprise a plurality of diodes 164A, 1648, and 164C arranged in parallelcircuit relationship. The respective anodes of each of the named diodesare connected to the positive terminal 76? of bridge circuit 76 and thecathodes are connected to the regulated voltage source V2 at junctionpoint or terminal 85. These diodes provide a high current short circuitpath into voltage source V2 should the value of V4 rise to such a highvalue as to endanger transistor 84 with excessive reversebase-to-emitter voltage. Diode array 164 therefore may act as a voltageregulation means during certain operating conditions for the positiveterminal 76P of bridge 76.

Referring now to FIG. 4, a transmission system comprising a power sourceor source of load power 12 which may be of the three phase or polyphasewye connected type with a grounded neutral terminal and a load circuit14 which also may be of three-phase wye connected type with a neutralterminal connected through a conductor to the neutral terminal of source12 is shown. As illustrated, the system includes three current monitors30, 30, and 30" along with three associated circuit breakers orinterrupters 50, 50' and 50", respectively, each of said circuitbreakers having separable contacts and a shunt tn'p coil. in addition,the system includes three ground fault sensors designated 32X, 32Y, and322, respectively. The output of each of the current monitors 30, 30'and 30" is connected to the monitor input temiinals 34A and 34B of therespective ground fault detectors 32X, 32Y, or 322. The shunt trip coilsof each of the circuit breakers 50, 50' and 50 are connected betweenterminals 60? and 608 of the sensors 32X, 32Y and 322, respectively.Electrical power, which may vary from 40 to volts (AC or DC) is appliedbetween terminals 60F and 60N of each of the three ground fault sensorsor detectors 32X, 32Y and 322.

In considering the operation of the system shown in FIG. 4, it isassumed that ground fault detector 32X has no input signals applied atterminals 6718 or 4918, but there is an output signal present betweensystem common terminal 31L and output terminal 37US. System commonterminal 31L of detector 32X is connected to a conductor Ll which isconnected to similar system common terminals in ground fault sensors 32Yand 32Z, respectively. The output terminals 37US of sensor 32X isconnected to the timed input terminal or timed input signal terminals6718 of ground fault detector 32Y and 32Z respectively. The outputterminal 37US of detector 32X is connected to the timed inputs or timedinput signal terminals 6718 of ground fault detector 32Y and, throughline L2, also to the no-trip input or no-trip input signal terminal 6718of ground fault detector 322. In addition, ground fault detector 32Y hasits output terminal 37US connected through line L3 to the timed input ortimed tripped input signal terminal 37lS of the ground fault detector32Z. Consequently, should current monitor 30, for example, sense apredetermined value of ground fault current, a signal will be providedfrom sensor 32X to sensor 32Y causing sensor 32Y to delay the trippingaction of circuit breaker 50' even through the circuit breaker 50 whichis associated with sensor 32X is actuated to trip open immediately. Inaddition, the output signal from the sensor 32X which is provided attenninals 31L and 37US is applied to sensor 32Z at terminal 31L and 4918to prevent sensor 322 from actuating the tripping of circuit breaker 50under any circumstances. It should also be noted that if a predeterminedground fault current is also sensed by current monitor 30L sensor 32Ywill provide an output signal to sensor or ground fault detector 32Z tothe timed input terminal 6718 thus allowing sensor 32Z to begin itstiming cycle should it also sense a predetermined ground fault currentthrough current monitor 30". Of course as was mentioned previously, noneof the operations within sensor 32Z will cause circuit breaker 50" totrip when a notrip signal is applied to sensor 32Z from sensor 32X.However, should sensor 32X be inadvertently damaged or should sensor 32Xnot operate normally for any reason, the output signal which is providedto the notrip input of sensor 32Z will no longer be present and thesensor 32Z will respond to a predetermined level of ground fault currentand actuate circuit breaker 50" to trip after the normal timing fordelay provided in the operation of sensor 32Z has elapsed.

Referring once again to FIG. 1 the ground fault sensor 32" may beconsidered as being composed of basic control logic blocksinterconnected to perform logic functions. For example, in one sense,inhibitor 69 may be considered as comprising in part a NOT logicfunction block, variable delay disabler 68 may be considered ascomprising in part an AND logic functional block, variable delay 40 maybe considered as comprising in part an OR logic functional block, switch48 may be considered as comprising in part an AND logic functional blockand switch disabler 49 may be considered as comprising in part a NOTlogic functional block.

Consequently, if AND 48 has not been disabled by the presence of asignal at terminal 4915 then circuit breaker 250 may be activated to theopen position by an output signal from voltage comparator 38 which hasbeen delayed by a portion of timing circuit or variable delay 40 orcircuit breaker 250 may be actuated open almost instantaneously by thepresence of a signal at output terminal 62 of voltage comparator 38 anda dis abling of the variable delay by the variable delay disabler 68'provided variable delay disabler or AND portion 68 has not itself beendisabled by the presence of a signal at terminal 67lS which may actuateor engage NOT or inhibitor circuit 69. Circuit breaker 250 will not beactuated if NOT element 49 is actuated.

It is to be understood that the current monitor 30 may actually compriseor include a plurality of current monitors, one of each line conductoror neutral conductor in the multi-phase or polyphase system. The outputsof such a plurality of current monitors may be summed at a summingpoint. It is also to be understood that, in practice, the ground faultdetector may sense ground faults in a perfectly or nearly perfectlybalanced three-phase system in which the neutral wire designated N isnot included within the periphery of the current monitor 30. Inaddition, it is to be understood that the source of power 12 in theassociated load circuit 14 may be adapted to any of the common types ofelectrical connections, such as a delta connection for both or the wyeconnections for both, or a combination of both types of connections.Multi-phase or polyphase systems which include more than three phasesmay also be monitored. It is also to be understood that the circuitinterrupted included in an overall system, such as circuit breaker 50,need not necessarily have a separate set of contacts to disconnect theneutral lead as is shown in the drawings. In addition, it is to beunderstood that the current monitor and associated ground fault detectorsystem may be used or utilized to detect other types of electricalsystem faults than ground faults. For example, a fault at a systemcommon member, such as the outer housing or shell of protective busduct, may also be detected by a ground fault detection system asdisclosed. It is also to be understood that the reset means 46 of theswitch actuator 44 may be a mechanical reset means or an electricalreset means or it may be reset merely by disconnecting the switchactuator 44 from its source of electrical energy 60. In addition, it isto be understood that the switch actuator with memory 44m may comprise adigital memory system or an analog memory system or a mechanical memorysystem or any combination of these. In addition, any and all of thefunctional sections, such as the sensor signal conditioner 36, thevoltage comparator 38, the variable delay 40 and so on, may be of theelectromechanical variety, or of the digital variety, or of the analogvariety or may comprise what is commonly known as software means such aspunched tape, so that a digital computer may perform any of all of thefunctions described with respect to each of the functional blocks. It isalso to be understood that the energy available at the output signalterminal 37US may be capable of providing energy to many other groundfault sensors or other monitoring or control circuitry simultaneously.It is also to be understood that the output terminal 37US and the twoinput terminals 3718 and 4918 need not necessarily be transformercoupled to remote or externally located electrical means, but may bedirectly coupled to them. It is also to be understood that theparticular detector circuit arrangement as shown in FIG. 4 need not benecessarily limited to the arrangement shown there but may be used invarious other input-output combinations which are limited only by thetotal number of possible input and output arrangements of amulti-detector system. It is also .to be understood that the groundfault sensor such as 32" may be used with other types of zero sequencephase detectors such as electrical networks or filters rather thancurrent transformer 30.

The apparatus embodying the teachings of this invention has severaladvantages. One advantage lies in the fact that the ground fault sensoris adapted to be incorporated into a system of ground fault sensors andperipheral monitoring and control equipment or means such that groundfaults may be more effectively isolated to small areas without affectingremaining parts of the overall electrical transmission system. This isdone by transmitting or providing delay and inhibiting signals amongground fault sensors in the same system to provide interlocking signalsor functions among the sensors.

We claim as our invention:

1. Electrical protective apparatus for responding to ground faultelectrical current in an electrical transmission system and foractuating a circuit interrupter to open upon the occurrence ofpredetermined operating conditions including, separable contacts whichform part of the transmission system comprising first means forobtaining an output current which varies with the ground current in saidsystem, second means connected to said first means for producing a firstoutput signal when said ground current exceeds substantially apredetermined value, a time delay means connected to said second meansfor producing a second output signal after substantially a predeterminedtime delay upon the occurrence of said first output signal, a disablingmeans connected to said time delay means for actuating said time delaymeans to produce said second output signal substantially instantaneouslyupon the occurrence of said first output signal, an output remote signalgenerator circuit connected to said first means, and a switching meansconnected to said time delay means and adapted to actuate said circuitinterrupter to open said contacts in response to said second outputsignal, said output remote signal generator being adapted to provide anadditional output signal which may be used to actuate a control functionat a remote location, said output remote signal generator being adaptedto provide said output signal to said remote location when saidpredetermined value of ground current is sensed by said second means ofsaid electrical apparatus, a

delay enabler circuit connected to said disabling means, said delayenabler circuit being adapted to respond to an external enabling signalapplied thereto to allow the actuation of said circuit interrupter toopen said contacts at substantially said predetermined time after saidpredetermined value of ground current has been sensed, said apparatusactuating said circuit interrupter to open said contacts substantiallyinstantaneously after said predetermined ground current has been sensedin the absence of said external enabling signal, a switch disablercircuit which upon application of an external disabling signal theretoprevents said switching means from actuating said circuit interrupteropen by said contacts of said circuit interrupter.

2. The combination as claimed in claim 1 wherein said additional outputsignal my be selectively applied as either an applied external enablingsignal or an external disabling signal.

3. A ground fault protective system adapted for use with a polyphasealternating current system comprising current transformer means fordriving an output current which varies with the ground current in saidsystem, an input electrical circuit having an input connected to saidcurrent transformer means and having output terminals for producing afirst output signal at said output terminals when said ground currentexceeds a predetermined value, a time delay means having an inputconnected to said output terminals of said input circuit and outputterminals for producing a second output signal at said output terminalsafter a predetermined time delay upon the occurrence of said firstoutput signal, an output circuit having an input connected to the outputterminals of said time delay means and output terminals for producing athird output in response to said second output signal, a delay enablercircuit including a delay disabler circuit having an input connected tosaid input electrical circuit and an output connected to said time delaymeans for normally producing an additional output signal when said inputelectrical circuit produces said first output signal, said additionaloutput signal being effective to actuate said time delay means toproduce said second output signal substantially instantaneously upon theoccurrence of said first output signal, said delay enabler circuitincluding an inhibitor circuit connected to said delay disabler circuitand adapted to respond to an external enabling signal to prevent saiddisabler circuit from producing said additional output signal when saidinput electrical circuit produces said first output signal to therebyinsure that said time delay means produces said second output signalonly after said predetermined time delay upon the occurrence of saidfirst output signal, and a disabler circuit connected to said outputcircuit and having an input adapted to receive a disabling signal, saidoutput circuit being prevented from producing said third output signalwhen said disabling signal is applied to the input of said disablercircuit.

4. The combination as claimed in claim 3 wherein an output remote signalgenerator is connected to said input electrical circuit and has anoutput for producing a further output signal when said input electricalcircuit produces said first output signal, said output signal beingadapted to selectively act as either an external enabler energizingsignal or a remote external disabler energizing signal.

5. The combination as claimed in claim 4 wherein said input electricalcircuit comprises a sensor signal conditioner circuit and a voltagecomparator circuit connected to said sensor signal conditioner, saidoutput electrical circuit comprises a switch actuator circuit and anelectrical switching circuit, said disabler circuit being adapted tocontrol the operating condition of said electrical switch, said sensorsignal conditioner having an input for receiving said output currentfrom said current transformer means and being adapted to provide anoutput voltage signal which varies with the magnitude of said groundcurrent, said output voltage signal being applied concurrently to saidoutput remote signal generator to actuate said remote signal generatorto provide said further output signal to said remote location and tosaid voltage comparator, both said output remote signal generator andsaid voltage comparator being so activated when said output voltage ofsaid sensor signal conditioner exceeds substantially a predeterminedvalue corresponding to said predetermined value of ground current toproduce said further output signal and said first output signal,respectively, said variable time delay means being adapted to actuatesaid time delay means to produce said second output signal to actuatesaid switch actuator circuit to produce a switch actuator output signalwhen said voltage comparator circuit produces said first output signal.

6. The combination as claimed in claim wherein said switch actuatorcircuit includes a memory means and a reset means connected to saidmemory means so that once said switch actuator circuit has been actuatedto produce a switch actuator output signal said switch actuator circuitcontinues to generate said switch actuator output signal until reset bysaid reset means.

7. The combination as claimed in claim 6 wherein said time delay meansis adapted to provide said switch actuator circuit with said secondoutput signal substantially concurrently with the sensing of said groundcurrent when said inhibitor circuit is not actuated by said externalenabling signal, said time delay means providing said switch actuatorcircuit with said second output signal after substantially apredetermined time delay upon the occurrence of said first output signalonly if said delay disabler circuit has been prevented by said delaydisabler inhibitor circuit from producing said additional output signal,said delay disabler inhibitor circuit being adapted to be actuated to aninhibiting operating state by the application of said external enablingsignal.

8. The combination as claimed in claim 7 wherein said sensor signalconditioner circuit includes first and second output terminals betweenwhich said output voltage signal appears, said remote signal generatorincluding first and second input resistors, said first and second inputresistors being connected in series circuit relationship between saidfirst and second output terminals of said sensor signal conditionercircuit, said series circuit having an interposed junction terminalbetween said resistors, a first transistor having a base terminal, acollector terminal and an emitter terminal, the latter two terminalsforming a collector to emitter circuit, a collector resistor and anemitter resistor; said base terminal of said first transistor beingconnected to said interposed junction terminal, said emitter terminalbeing connected to said emitter resistor and said collector terminalbeing connected to said collector resistor, a first source of power withpositive and negative output terminals, said emitter resistor, saidcollector resistor and the collector to emitter circuit of said firsttransistor being connected in circuit relation with and energized bysaid first source of power, a first gated four layer solid state devicehaving an anode, a cathode and a gate terminal, said gate terminal beingelectrically connected tosaid collector of said first transistor, a fullwave bridge rectifier circuit having a plurality of diodes each capableof conducting electrical current in a forward direction, said bridgecircuit including positive and negative output terminals, and first andsecond input terminals, a first load means, a second source of powerwith first and second output terminals, said first output terminal ofsaid second source of power being connected through said first loadmeans to said first input terminal of said bridge circuit, said secondoutput terminal of said second source of power being connected to saidsecond input terminal of said bridge circuit, said positive outputterminal of said bridge circuit being connected to said anode of saidfour layer solid state device, said negative output terminal of saidbridge circuit being connected to said cathode of said four layer solidstate device whereby as said sensor signal conditioner output voltagesignal increases said base of said first transistor becomes forwardbiased and said first transistor conducts substantial electrical currentfrom said collector terminal to said emitter terminal causing thevoltage at said emitter terminal to increase to a value sufficient toenergize said gate of said four layer solid state device causing saidfour layer solid state device to conduct electrical load current fromsaid first terminal of said second source of power through said firstload means through a first forwardly conducting diode of said circuitbridge, through said four layer solid state device from anode tocathode, through a second forwardly conducting diode of said bridgecircuit to the second terminal of said second source of power, saidcurrent which fiows in said first load means generating said outputremote signal.

9. The combination as claimed in claim 8 wherein said first load meansincludes a transformer having primary and secondary windings, saidsecondary winding having first and second output terminals, said primarywinding being connected electrically between said first terminal of saidsecond source of power and the first said forwardly conducting bridgediode, said output remote signal when present being available betweensaid first and second output terminals of said second winding, saidgated four layer solid state device comprising a silicon controlledrectifier.

10. The combination as claimed in claim 8 wherein said sensor signalconditioner circuit includes a pair of output terminals, a system commonpotential conductor is connected to one of the sensor signal conditionercircuit output terminals, said delay disabler circuit includes a secondtransistor having a base terminal, an emitter terminal, a collectorterminal, and a collectorto-emitter circuit, one of said outputterminals of said time delay means being connected to said system commonconductor through a resistive element, and the collector to emittercircuit of said second transistor, said inhibitor circuit having a firstterminal, said base of said second transistor being connected to saidfirst terminal of said inhibitor circuit, said emitter of said secondtransistor being connected to one end of said last-mentioned resistiveelement, said collector of said second transistor being connected tosaid one of said output terminals of said time delay means, when saidinhibitor circuit is not energized by said enabler energy signal saidsecond transistor being forward biased to effectively connect said oneof said output terminals of said time delay means to said system commonconductor through the conducting collector-to-emitter circuit of saidsecond transistor and the last-mentioned resistive element, said secondoutput signal of said time delay means being provided to said switchactuator circuit substantially instantaneously upon the sensing of saidpredetermined value of ground current.

11. The combination as claimed in claim wherein said inhibitor circuitincludes a third transistor having base, collector and emitterterminals, said first terminal of said inhibitor circuit comprising saidcollector terminal, a second full wave bridge rectifier circuit and afirst input means, said second bridge rectifier circuit having positiveand negative output terminals and an input terminal, said positiveoutput terminal of said second bridge circuit being connected to thebase terminal of said third transistor, said negative output terminalbeing connected to the emitter of said third transistor, said firstinput means being connected to said input terminals of said secondbridge rectifier circuit.

12. The combination as claimed in claim 11 wherein said first inputmeans comprises a second transformer with primary and secondarywindings, said secondary winding being connected to said input terminalsof said second bridge circuit, said primary winding being adapted toreceive said external enabling signal.

13. The combination as claimed in claim 8 wherein said circuitinterrupter includes a shunt trip coil, said switch comprises a secondgated four layer solid state device having anode, cathode and gateterminals, a

, second switch and a diode connected in series circuit relationship,one end of the shunt trip coil of said circuit interrupter beingconnected through said latter mentioned diode and said second switch tothe anode of said second four layer solid state device, the other end ofsaid shunt trip coil being connected to said first terminal of saidsecond source of power, the cathode of said second four layer solidstate device coil being adapted to be connected to the second terminalof said second source of power, when said second four layer solid statedevice is energized at said gate, a circuit including said shunt tripcoil is completed and said shunt trip coil is energized, said disablercircuit comprising a fourth transistor with base, collector and emitterterminals, a third full wave bridge rectifier circuit and a second inputmeans, said third bridge rectifier circuit and a second input means,said third bridge rectifier circuit having positive and negative outputterminals and first and second input terminals, said positive outputterminal of said third bridge circuit being connected to the baseterminal of said fourth transistor, said negative output terminal ofsaid third bridge circuit being connected to the emitter terminal ofsaid fourth transistor, said collector terminal of said fourthtransistor being connected to the gate terminal of said second gatedfour layer solid state device, a system common conductor is provided,said last mentioned emitter terminal being connected to said systemcommon conductor, said second input means being connected to said inputterminals of said third bridge circuit and being adapted to transfersaid external switch disabling signal through said bridge circuit toforward bias and fourth transistor to effectively connect said gate ofsaid second four layer gated solid state device to said system commonconductor to prevent said second four layer solid state device fromconducting substantial electrical current through said shunt trip coil.

14. The combination as claimed in claim 13 wherein said second inputmeans comprises a third transformer having primary and secondarywindings, said secondary wi din bei co nected to s id in ut terminals ofsaid bridge %ircu i, said primary winding being adaptable to receivesaid external disabling signal.

1. Electrical protective apparatus for responding to ground faultelectrical current in an electrical transmission system and foractuating a circuit interrupter to open upon the occurrence ofpredetermined operating conditions including, separable contacts whichform part of the transmission system comprising first means forobtaining an output current which varies with the ground current in saidsystem, second means connected to said first means for producing a firstoutput signal when said ground current exceeds substantially apredetermined value, a time delay means connected to said second meansfor producing a second output signal after substantially a predeterminedtime delay upon the occurrence of said first output signal, a disablingmeans connected to said time delay means for actuating said time delaymeans to produce said second output signal substantially instantaneouslyupon the occurrence of said first output signal, an output remote signalgenerator circuit connected to said first means, and a switching meansconnected to said time delay means and adapted to actuate said circuitinterrupter to open said contacts in response to said second outputsignal, said output remote signal generator being adapted to provide anadditional output signal which may be used to actuate a control functionat a remote location, said output remote signal generator being adaptedto provide said output signal to said remote location when saidpredetermined value of ground current is sensed by said second means ofsaid electrical apparatus, a delay enabler circuit connected to saiddisabling means, said delay enabler circuit being adapted to respond toan external enabling signal applied thereto to allow the actuation ofsaid circuit interrupter to open said contacts at substantially saidpredetermined time after said predetermined value of ground current hasbeen sensed, said apparatus actuating said circuit interrupter to opensaid contacts substantially instantaneously after said predeterminedground current has been sensed in the absence of said external enablingsignal, a switch disabler circuit which upon application of an externaldisabling signal thereto prevents said switching means from actuatingsaid circuit interrupter open by said contacts of said circuitinterrupter.
 2. The combination as claimed in claim 1 wherein saidadditional output signal my be selectively applied as either an appliedexternal enabling signal or an external disabling signal.
 3. A groundfault protective system adapted for use with a polyphase alternatingcurrent system comprising current transformer means for driving anoutput current which varies with the ground current in said system, aninput electrical circuit having an input connected to said currenttransformer means and having output terminals for producing a firstoutput signal at said output terminals when said ground current exceedsa predetermined value, a time delay means having an input connected tosaid output terminals of said input circuit and output terminals forproducing a second output signal at said output terminals after apredetermined time delay upon the occurrence of said first outputsignal, an output circuit having an input connected to the outputterminals of said time delay means and output terminals for producing athird output in response to said second output signal, a delay enablercircuit including a delay disabler circuit having an input connected tosaid input electrical circuit and an output connected to said time delaymeans for normally producing an additional output signal when said inputelectrical circuit produces said first output signal, said additionaloutput signal being effective to actuate said time delay means toproduce said second output signal substantially instantaneously upon theoccurrence of said first output signal, said delay enabler circuitincluding an inhibitor circuit connected to said delay disabler circuitand adapted to respond to an external enabling signal to prevent saiddisabler circuit from producing said additional output signal when saidinput electrical circuit produces said first output signal to therebyinsure that said time delay means produces said second output signalonly after said predetermined time delay upon the occurrence of saidfirst output signal, and a disabler circuit connected to said outputcircuit and having an input adapted to receive a disabling signal, saidoutput circuit being prevented from producing said third output signalwhen said disabling signal is applied to the input of said disablercircuit.
 4. The combination as claimed in claim 3 wherein an outputremote signal generator is connected to said input electrical circuitand has an output for producing a further output signal when said inputelectrical circuit produces said first output signal, saiD output signalbeing adapted to selectively act as either an external enablerenergizing signal or a remote external disabler energizing signal. 5.The combination as claimed in claim 4 wherein said input electricalcircuit comprises a sensor signal conditioner circuit and a voltagecomparator circuit connected to said sensor signal conditioner, saidoutput electrical circuit comprises a switch actuator circuit and anelectrical switching circuit, said disabler circuit being adapted tocontrol the operating condition of said electrical switch, said sensorsignal conditioner having an input for receiving said output currentfrom said current transformer means and being adapted to provide anoutput voltage signal which varies with the magnitude of said groundcurrent, said output voltage signal being applied concurrently to saidoutput remote signal generator to actuate said remote signal generatorto provide said further output signal to said remote location and tosaid voltage comparator, both said output remote signal generator andsaid voltage comparator being so activated when said output voltage ofsaid sensor signal conditioner exceeds substantially a predeterminedvalue corresponding to said predetermined value of ground current toproduce said further output signal and said first output signal,respectively, said variable time delay means being adapted to actuatesaid time delay means to produce said second output signal to actuatesaid switch actuator circuit to produce a switch actuator output signalwhen said voltage comparator circuit produces said first output signal.6. The combination as claimed in claim 5 wherein said switch actuatorcircuit includes a memory means and a reset means connected to saidmemory means so that once said switch actuator circuit has been actuatedto produce a switch actuator output signal said switch actuator circuitcontinues to generate said switch actuator output signal until reset bysaid reset means.
 7. The combination as claimed in claim 6 wherein saidtime delay means is adapted to provide said switch actuator circuit withsaid second output signal substantially concurrently with the sensing ofsaid ground current when said inhibitor circuit is not actuated by saidexternal enabling signal, said time delay means providing said switchactuator circuit with said second output signal after substantially apredetermined time delay upon the occurrence of said first output signalonly if said delay disabler circuit has been prevented by said delaydisabler inhibitor circuit from producing said additional output signal,said delay disabler inhibitor circuit being adapted to be actuated to aninhibiting operating state by the application of said external enablingsignal.
 8. The combination as claimed in claim 7 wherein said sensorsignal conditioner circuit includes first and second output terminalsbetween which said output voltage signal appears, said remote signalgenerator including first and second input resistors, said first andsecond input resistors being connected in series circuit relationshipbetween said first and second output terminals of said sensor signalconditioner circuit, said series circuit having an interposed junctionterminal between said resistors, a first transistor having a baseterminal, a collector terminal and an emitter terminal, the latter twoterminals forming a collector to emitter circuit, a collector resistorand an emitter resistor; said base terminal of said first transistorbeing connected to said interposed junction terminal, said emitterterminal being connected to said emitter resistor and said collectorterminal being connected to said collector resistor, a first source ofpower with positive and negative output terminals, said emitterresistor, said collector resistor and the collector to emitter circuitof said first transistor being connected in circuit relation with andenergized by said first source of power, a first gated four layer solidstate device having an anode, a cathode and a gate terminal, said gateterminal being electrically connected to said collector of said firsttransistor, a full wave bridge rectifier circuit having a plurality ofdiodes each capable of conducting electrical current in a forwarddirection, said bridge circuit including positive and negative outputterminals, and first and second input terminals, a first load means, asecond source of power with first and second output terminals, saidfirst output terminal of said second source of power being connectedthrough said first load means to said first input terminal of saidbridge circuit, said second output terminal of said second source ofpower being connected to said second input terminal of said bridgecircuit, said positive output terminal of said bridge circuit beingconnected to said anode of said four layer solid state device, saidnegative output terminal of said bridge circuit being connected to saidcathode of said four layer solid state device whereby as said sensorsignal conditioner output voltage signal increases said base of saidfirst transistor becomes forward biased and said first transistorconducts substantial electrical current from said collector terminal tosaid emitter terminal causing the voltage at said emitter terminal toincrease to a value sufficient to energize said gate of said four layersolid state device causing said four layer solid state device to conductelectrical load current from said first terminal of said second sourceof power through said first load means through a first forwardlyconducting diode of said circuit bridge, through said four layer solidstate device from anode to cathode, through a second forwardlyconducting diode of said bridge circuit to the second terminal of saidsecond source of power, said current which flows in said first loadmeans generating said output remote signal.
 9. The combination asclaimed in claim 8 wherein said first load means includes a transformerhaving primary and secondary windings, said secondary winding havingfirst and second output terminals, said primary winding being connectedelectrically between said first terminal of said second source of powerand the first said forwardly conducting bridge diode, said output remotesignal when present being available between said first and second outputterminals of said second winding, said gated four layer solid statedevice comprising a silicon controlled rectifier.
 10. The combination asclaimed in claim 8 wherein said sensor signal conditioner circuitincludes a pair of output terminals, a system common potential conductoris connected to one of the sensor signal conditioner circuit outputterminals, said delay disabler circuit includes a second transistorhaving a base terminal, an emitter terminal, a collector terminal, and acollector-to-emitter circuit, one of said output terminals of said timedelay means being connected to said system common conductor through aresistive element, and the collector to emitter circuit of said secondtransistor, said inhibitor circuit having a first terminal, said base ofsaid second transistor being connected to said first terminal of saidinhibitor circuit, said emitter of said second transistor beingconnected to one end of said last-mentioned resistive element, saidcollector of said second transistor being connected to said one of saidoutput terminals of said time delay means, when said inhibitor circuitis not energized by said enabler energy signal said second transistorbeing forward biased to effectively connect said one of said outputterminals of said time delay means to said system common conductorthrough the conducting collector-to-emitter circuit of said secondtransistor and the last-mentioned resistive element, said second outputsignal of said time delay means being provided to said switch actuatorcircuit substantially instantaneously upon the sensing of saidpredetermined value of ground current.
 11. The combination as claimed inclaim 10 wherein said inhibitor circuit includes a third transistorhaving base, collector and emitter terminals, said first terminal ofsaid inhibitor circuit comprising said collector terminal, a second fullwave bridge rectifier circuit and a first input means, said secondbridge rectifier circuit having positive and negative output terminalsand an input terminal, said positive output terminal of said secondbridge circuit being connected to the base terminal of said thirdtransistor, said negative output terminal being connected to the emitterof said third transistor, said first input means being connected to saidinput terminals of said second bridge rectifier circuit.
 12. Thecombination as claimed in claim 11 wherein said first input meanscomprises a second transformer with primary and secondary windings, saidsecondary winding being connected to said input terminals of said secondbridge circuit, said primary winding being adapted to receive saidexternal enabling signal.
 13. The combination as claimed in claim 8wherein said circuit interrupter includes a shunt trip coil, said switchcomprises a second gated four layer solid state device having anode,cathode and gate terminals, a second switch and a diode connected inseries circuit relationship, one end of the shunt trip coil of saidcircuit interrupter being connected through said latter mentioned diodeand said second switch to the anode of said second four layer solidstate device, the other end of said shunt trip coil being connected tosaid first terminal of said second source of power, the cathode of saidsecond four layer solid state device coil being adapted to be connectedto the second terminal of said second source of power, when said secondfour layer solid state device is energized at said gate, a circuitincluding said shunt trip coil is completed and said shunt trip coil isenergized, said disabler circuit comprising a fourth transistor withbase, collector and emitter terminals, a third full wave bridgerectifier circuit and a second input means, said third bridge rectifiercircuit and a second input means, said third bridge rectifier circuithaving positive and negative output terminals and first and second inputterminals, said positive output terminal of said third bridge circuitbeing connected to the base terminal of said fourth transistor, saidnegative output terminal of said third bridge circuit being connected tothe emitter terminal of said fourth transistor, said collector terminalof said fourth transistor being connected to the gate terminal of saidsecond gated four layer solid state device, a system common conductor isprovided, said last mentioned emitter terminal being connected to saidsystem common conductor, said second input means being connected to saidinput terminals of said third bridge circuit and being adapted totransfer said external switch disabling signal through said bridgecircuit to forward bias and fourth transistor to effectively connectsaid gate of said second four layer gated solid state device to saidsystem common conductor to prevent said second four layer solid statedevice from conducting substantial electrical current through said shunttrip coil.
 14. The combination as claimed in claim 13 wherein saidsecond input means comprises a third transformer having primary andsecondary windings, said secondary winding being connected to said inputterminals of said bridge circuit, said primary winding being adaptableto receive said external disabling signal.